使用430實現CC1101的發送
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下載附件
2017-4-11 20:42 上傳
完整代碼下載:
CC1101_TX.rar
(34.95 KB, 下載次數: 37)
2017-4-11 08:41 上傳
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cc1101 下載積分: 黑幣 -5
單片機源程序:
- #include "msp430g2452.h"
- #include "common.h"
- #include "regssrf04.h"
- #include "initial_spi.h"
- #include "Uart9600.h"
- #define CRC_OK 0x80
- #define RSSI 0
- #define LQI 1
- #define BYTES_IN_RXFIFO 0x7F
- #define sys_in P2OUT|=BIT3;
- #define com_on P2OUT|=BIT4;
- #define com_off P2OUT&=~BIT4;
- #define sys_0ff P2OUT&=~BIT3;
- BYTE rxBuffer[61];
- BYTE txBuffer[10]={0x80,0x00,0x00,0x00,0x00,0x90,0x00,0x50,0x50,0x50};
- void halRfWriteRfSettings(/*const RF_SETTINGS *pRfSettings*/);
- void halRfSendPacket(BYTE *txBuffer, UINT8 size) ;
- void interrupt_initial();
- void delay_tx();
- unsigned char tx_ready=0;
- unsigned char length;
- unsigned char count=0;
- void systime_initial(void)
- {
- WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
- DCOCTL =CALDCO_1MHZ;
- BCSCTL1 = CALBC1_1MHZ;
- __enable_interrupt();
- }
- void IO_initial(void)
- {
- //********************************************************
- //SPI端口初始化
- //********************************************************
- SI_OUTPUT ;
- SO_INPUT ;
- CSN_OUTPUT;
- SCLK_OUTPUT;
- P2DIR|=BIT3+BIT4; //系統,通信指示燈
- //**************************************************************
- //串口初始化,模擬的
- //******************************************************************
- P1SEL = UART_TXD + UART_RXD; // 串口,Timer function for TXD/RXD pins
- P1DIR|=UART_TXD;
- //******************************************************************
- }
- //******************************************************************
- //***中斷初始化
- //*****************************************************************
- void halRfWriteRfSettings()
- {
- // Write register settings
- SPI_WriteReg(CCxxx0_FSCTRL1, 0x06);// FSCTRL1 Frequency synthesizer control.
- SPI_WriteReg(CCxxx0_FSCTRL0, 0x00);// FSCTRL0 Frequency synthesizer control.
- SPI_WriteReg(CCxxx0_FREQ2, 0x10);// FREQ2 Frequency control word, high byte.
- SPI_WriteReg(CCxxx0_FREQ1, 0xB1);// FREQ1 Frequency control word, middle byte.
- SPI_WriteReg(CCxxx0_FREQ0, 0x3B);// FREQ0 Frequency control word, low byte.
- SPI_WriteReg(CCxxx0_MDMCFG4, 0xF6);// MDMCFG4 Modem configuration.
- SPI_WriteReg(CCxxx0_MDMCFG3, 0x83);// MDMCFG3 Modem configuration.
- SPI_WriteReg(CCxxx0_MDMCFG2, 0x13);// MDMCFG2 Modem configuration.
- SPI_WriteReg(CCxxx0_MDMCFG1, 0x22);// MDMCFG1 Modem configuration.
- SPI_WriteReg(CCxxx0_MDMCFG0, 0xF8);// MDMCFG0 Modem configuration.
- SPI_WriteReg(CCxxx0_CHANNR, 0x00);// CHANNR Channel number.
- SPI_WriteReg(CCxxx0_DEVIATN, 0x15);// DEVIATN Modem deviation setting (when FSK modulation is enabled).
- SPI_WriteReg(CCxxx0_FREND1, 0x56);// FREND1 Front end RX configuration.
- SPI_WriteReg(CCxxx0_FREND0, 0x10);// FREND0 Front end TX configuration.
- SPI_WriteReg(CCxxx0_MCSM0 , 0x18);// MCSM0 Main Radio Control State Machine configuration.
- SPI_WriteReg(CCxxx0_FOCCFG, 0x16);// FOCCFG Frequency Offset Compensation Configuration.
- SPI_WriteReg(CCxxx0_BSCFG, 0x6C);// BSCFG Bit synchronization Configuration.
- SPI_WriteReg(CCxxx0_AGCCTRL2, 0x03);// AGCCTRL2 AGC control.
- SPI_WriteReg(CCxxx0_AGCCTRL1, 0x40);// AGCCTRL1 AGC control.
- SPI_WriteReg(CCxxx0_AGCCTRL0, 0x91);// AGCCTRL0 AGC control.
- SPI_WriteReg(CCxxx0_FSCAL3, 0xE9);// FSCAL3 Frequency synthesizer calibration.
- SPI_WriteReg(CCxxx0_FSCAL2, 0x2A);// FSCAL2 Frequency synthesizer calibration.
- SPI_WriteReg(CCxxx0_FSCAL1, 0x00);// FSCAL1 Frequency synthesizer calibration.
- SPI_WriteReg(CCxxx0_FSCAL0, 0x1F);// FSCAL0 Frequency synthesizer calibration.
- SPI_WriteReg(CCxxx0_FSTEST, 0x59);// FSTEST Frequency synthesizer calibration.
- SPI_WriteReg(CCxxx0_TEST2, 0x81);// TEST2 Various test settings.
- SPI_WriteReg(CCxxx0_TEST1, 0x35);// TEST1 Various test settings.
- SPI_WriteReg(CCxxx0_TEST0, 0x09);// TEST0 Various test settings.
- SPI_WriteReg(CCxxx0_FIFOTHR, 0x47);// FIFOTHR RXFIFO and TXFIFO thresholds.
- SPI_WriteReg(CCxxx0_IOCFG2, 0x2e);// IOCFG2 GDO2 output pin configuration.
- SPI_WriteReg(CCxxx0_IOCFG0, 0x06);// IOCFG0D GDO0 output pin configuration.
- SPI_WriteReg(CCxxx0_PKTCTRL1, 0x04);// PKTCTRL1 Packet automation control.
- SPI_WriteReg(CCxxx0_PKTCTRL0, 0x05);// PKTCTRL0 Packet automation control.
- SPI_WriteReg(CCxxx0_ADDR, 0x00);// ADDR Device address.
- SPI_WriteReg(CCxxx0_PKTLEN, 0xFF);// PKTLEN Packet length.
- }
- void interrupt_initial()
- {
- WDTCTL = WDT_MDLY_32; // Set Watchdog Timer interval to ~30ms
- IE1 |= WDTIE; // Enable WDT interrupt
- }
- #pragma vector=WDT_VECTOR
- __interrupt void watchdog_timer(void)
- {
- count=count+1;
- if(count>250)
- {
- count=0;
- SPI_Strobe(CCxxx0_SIDLE );
- halRfSendPacket(txBuffer, 10);
- // com_on;
- __delay_cycles(10000);
- __delay_cycles(10000);
- SPI_Strobe(CCxxx0_SPWD);
- _bis_SR_register(LPM4_bits);
- }
- }
- BYTE halRfReceivePacket(BYTE *rxBuffer, UINT8 *length)
- {
- BYTE status[2];
- unsigned char packetLength;
- unsigned char DATE;
- SPI_Strobe(CCxxx0_SRX);
- // Wait for GDO0 to be set -> sync received
- while (!GDO0_PIN);
- // Wait for GDO0 to be cleared -> end of packet
- while (GDO0_PIN);
- DATE=SPI_ReadStatus(CCxxx0_RXBYTES);
- // This status register is safe to read since it will not be updated after
- // the packet has been received (See the CC1100 and 2500 Errata Note)
- if (( DATE& BYTES_IN_RXFIFO))
- {
- // Read length byte
- packetLength = SPI_ReadReg(CCxxx0_RXFIFO);
- // Read data from RX FIFO and store in rxBuffer
- if (packetLength <= *length)
- {
- SPI_ReadBurstReg(CCxxx0_RXFIFO, rxBuffer, packetLength);
- *length = packetLength;
- // Read the 2 appended status bytes (status[0] = RSSI, status[1] = LQI)
- SPI_ReadBurstReg(CCxxx0_RXFIFO, status, 2);
- // MSB of LQI is the CRC_OK bit
- return (status[LQI] & CRC_OK);
- }
- else
- {
- *length = packetLength;
- // Make sure that the radio is in IDLE state before flushing the FIFO
- // (Unless RXOFF_MODE has been changed, the radio should be in IDLE state at this point)
- SPI_Strobe(CCxxx0_SIDLE);
- // Flush RX FIFO
- SPI_Strobe(CCxxx0_SFRX);
- return FALSE;
-
- }
- }
- else
- {
- return FALSE;
-
- }
-
- }// halRfReceivePacket
- void halRfSendPacket(BYTE *txBuffer, UINT8 size)
- {
- SPI_WriteReg(CCxxx0_TXFIFO ,size);
- SPI_WriteBurstReg(CCxxx0_TXFIFO, txBuffer, size);
- SPI_Strobe(CCxxx0_STX);
- // Wait for GDO0 to be set -> sync received
- while (!GDO0_PIN);
- // Wait for GDO0 to be cleared -> end of packet
- while (GDO0_PIN);
- SPI_Strobe(CCxxx0_SFTX);
- }
- void main(void)
- {
- //unsigned char m;
- systime_initial();
- IO_initial();
- interrupt_initial();
- TimerA_UART_init();
- SPI_Strobe(CCxxx0_SRES);
- halRfWriteRfSettings(/*&rfSettings*/ );
- __delay_cycles(10000);
- sys_0ff; //系統啟動指示燈亮
- while(1)
- {
- com_off;
- }
- }
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