/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_usart.h"
#include "stm32f4xx_rcc.h"
/**
* STM32F407ZE的DMA1、DMA2資源分配:
*
* （1）TIM3_CH1_PWM（PA6） DMA1_Stream2 DMA_Channel_5 脈沖發送
* （2）TIM4_CH1_PWM（PD12） DMA1_Stream6 DMA_Channel_2 脈沖發送
* （3）TIM2_CH1_ETR（PA15） DMA1_Stream5 DMA_Channel_3 脈沖捕獲
* （4）TIM5_CH2_ETR（PA1） DMA1_Stream4 DMA_Channel_6 脈沖捕獲
* （5）SPI3_RX DMA1_Stream0 DMA_Channel_0 批量讀SPI Flash
* （6）SPI3_TX DMA1_Stream7 DMA_Channel_0 批量寫SPI Flash
* （7）USART3_RX(PD9) DMA1_Stream1 DMA_Channel_4 串口3接收(一般不用DMA接收)
* （8）USART3_TX(PD8) DMA1_Stream3 DMA_Channel_4 串口3發送
*
* （1）ADC1 DMA2_Stream0 DMA_Channel_0 多通道模擬量輸入檢測
* （2）SPI1_RX DMA2_Stream2 DMA_Channel_3 批量讀SPI Flash
* （3）SPI1_TX DMA2_Stream3 DMA_Channel_3 批量寫SPI Flash
* （4）USART6_RX(PG9) DMA2_Stream1 DMA_Channel_5 串口6接收(一般不用DMA接收)
* （5）USART6_TX(PG14) DMA2_Stream6 DMA_Channel_5 串口6發送
* （6）USART1_RX DMA2_Stream5 DMA_Channel_4 串口1接收(一般不用DMA接收)
* （7）USART1_TX DMA2_Stream7 DMA_Channel_4 串口1發送
*
*/
uint8_t USART3_RX_DMA_Buf[1024];
uint8_t USART3_TX_DMA_Buf[1024];
uint8_t USART6_RX_DMA_Buf[1024];
uint8_t USART6_TX_DMA_Buf[1024];
uint8_t Flag_USART3_DMA_TX_Finish;
uint8_t Flag_USART3_DMA_RX_Finish;
uint8_t Flag_USART6_DMA_TX_Finish;
uint8_t Flag_USART6_DMA_RX_Finish;
/**
* @brief USART3_Config
* @param None.
* @retval None.
*/
void USART3_Config(void) {
USART_InitTypeDef USART_InitStruct;
USART_ClockInitTypeDef USART_ClockInitStruct;
GPIO_InitTypeDef GPIO_InitStruct;
DMA_InitTypeDef DMA_InitStruct;
NVIC_InitTypeDef NVIC_InitStruct;
/* Enable GPIO clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1 , ENABLE);
/* Enable USART3 clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
USART_ClockStructInit(&USART_ClockInitStruct);
USART_ClockInit(USART3,&USART_ClockInitStruct);
/*
* USART3_RX: PD9
* USART3_TX: PD8
* USART3_DE: PB7
*/
/* Configure USART3_Rx(PD9) as input floating */
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_9;
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
GPIO_Init(GPIOD, &GPIO_InitStruct);
/* Configure USART3_Tx(PD8) as alternate function */
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_8;
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
GPIO_Init(GPIOD, &GPIO_InitStruct);
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_7;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_USART3);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_USART3);
/* USARTx configured as follows:
- BaudRate = 5250000 baud
- Maximum BaudRate that can be achieved when using the Oversampling by 8
is: (USART APB Clock / 8)
Example:
- (USART3 APB1 Clock / 8) = (42 MHz / 8) = 5250000 baud
- (USART1 APB2 Clock / 8) = (84 MHz / 8) = 10500000 baud
- Maximum BaudRate that can be achieved when using the Oversampling by 16
is: (USART APB Clock / 16)
Example: (USART3 APB1 Clock / 16) = (42 MHz / 16) = 2625000 baud
Example: (USART1 APB2 Clock / 16) = (84 MHz / 16) = 5250000 baud
- Word Length = 8 Bits
- one Stop Bit
- No parity
- Hardware flow control disabled (RTS and CTS signals)
- Receive and transmit enabled
*/
USART_InitStruct.USART_BaudRate = 115200;
USART_InitStruct.USART_WordLength = USART_WordLength_8b;
USART_InitStruct.USART_StopBits = USART_StopBits_1;
USART_InitStruct.USART_Parity = USART_Parity_No;
USART_InitStruct.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStruct.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(USART3, &USART_InitStruct);
USART_DMACmd(USART3, USART_DMAReq_Tx | USART_DMAReq_Rx, ENABLE);
// USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
USART_Cmd(USART3, ENABLE);
/* USART3_DMA_RX DMA1_Stream1 DMA_Channel_4 */
DMA_DeInit(DMA1_Stream1);
DMA_InitStruct.DMA_Channel = DMA_Channel_4;
DMA_InitStruct.DMA_PeripheralBaseAddr = (uint32_t)&(USART3->DR);
DMA_InitStruct.DMA_Memory0BaseAddr = (uint32_t)&USART3_RX_DMA_Buf[0];
DMA_InitStruct.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStruct.DMA_BufferSize = 0;
DMA_InitStruct.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStruct.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStruct.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStruct.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStruct.DMA_Mode = DMA_Mode_Normal;
DMA_InitStruct.DMA_Priority = DMA_Priority_High;
DMA_InitStruct.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStruct.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStruct.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStruct.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA1_Stream1, &DMA_InitStruct);
/* Enable DMA Stream Transfer Complete interrupt */
DMA_ITConfig(DMA1_Stream1, DMA_IT_TC, ENABLE);
DMA_Cmd(DMA1_Stream1, DISABLE);
DMA_DeInit(DMA1_Stream3);
DMA_InitStruct.DMA_Channel = DMA_Channel_4;
DMA_InitStruct.DMA_PeripheralBaseAddr = (uint32_t) &(USART3->DR);
DMA_InitStruct.DMA_Memory0BaseAddr = (uint32_t)&USART3_TX_DMA_Buf[0];
DMA_InitStruct.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStruct.DMA_BufferSize = 0;
DMA_InitStruct.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStruct.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStruct.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStruct.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStruct.DMA_Mode = DMA_Mode_Normal;
DMA_InitStruct.DMA_Priority = DMA_Priority_High;
DMA_InitStruct.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStruct.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStruct.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStruct.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA1_Stream3, &DMA_InitStruct);
/* USART3_DMA_TX DMA1_Stream3 DMA_Channel_4 */
DMA_ITConfig(DMA1_Stream3, DMA_IT_TC, ENABLE);
/* Configure one bit for preemption priority */
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_0);
/* Enable DMA1_Stream1 Interrupt */
NVIC_InitStruct.NVIC_IRQChannel = DMA1_Stream1_IRQn;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStruct.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStruct);
/* Enable DMA1_Stream3 Interrupt */
NVIC_InitStruct.NVIC_IRQChannel = DMA1_Stream3_IRQn;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStruct.NVIC_IRQChannelSubPriority = 2;
NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStruct);
/* Enable USART3 Interrupt */
NVIC_InitStruct.NVIC_IRQChannel = USART3_IRQn;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStruct);
}
/**
* @brief USART6_Config
*
* @param None.
* @retval None.
*/
void USART6_Config(void) {
GPIO_InitTypeDef GPIO_InitStruct;
USART_InitTypeDef USART_InitStruct;
USART_ClockInitTypeDef USART_ClockInitStruct;
DMA_InitTypeDef DMA_InitStruct;
NVIC_InitTypeDef NVIC_InitStruct;
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOG, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART6, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2 , ENABLE);
USART_ClockStructInit(&USART_ClockInitStruct);
USART_ClockInit(USART6,&USART_ClockInitStruct);
/*
* USART6_RX: PG9
* USART6_TX: PG14
* USART6_DE: PD7
*/
/* Configure USART6 Rx (PG9) as input floating */
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_9;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOG, &GPIO_InitStruct);
/* Configure USART6 Tx (PG14) as alternate function push-pull */
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_14;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(GPIOG, &GPIO_InitStruct);
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_7;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOD, &GPIO_InitStruct);
GPIO_PinAFConfig(GPIOG,GPIO_PinSource9, GPIO_AF_USART6);
GPIO_PinAFConfig(GPIOG,GPIO_PinSource14,GPIO_AF_USART6);
USART_InitStruct.USART_BaudRate = 115200;
USART_InitStruct.USART_WordLength = USART_WordLength_8b;
USART_InitStruct.USART_StopBits = USART_StopBits_1;
USART_InitStruct.USART_Parity = USART_Parity_No;
USART_InitStruct.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStruct.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(USART6,&USART_InitStruct);
USART_DMACmd(USART6, USART_DMAReq_Tx | USART_DMAReq_Rx,ENABLE);
// USART_ITConfig(USART6,USART_IT_RXNE,ENABLE);
USART_Cmd(USART6, ENABLE);
DMA_DeInit(DMA2_Stream1);
/* USART6_DMA_RX use DMA2_Stream2 */
DMA_InitStruct.DMA_Channel = DMA_Channel_5;
DMA_InitStruct.DMA_PeripheralBaseAddr = (uint32_t)&(USART6->DR);
DMA_InitStruct.DMA_Memory0BaseAddr = (uint32_t)&USART6_RX_DMA_Buf[0];
DMA_InitStruct.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStruct.DMA_BufferSize = (uint32_t)0;
DMA_InitStruct.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStruct.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStruct.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStruct.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStruct.DMA_Mode = DMA_Mode_Normal;
DMA_InitStruct.DMA_Priority = DMA_Priority_High;
DMA_InitStruct.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStruct.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
DMA_InitStruct.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStruct.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA2_Stream1, &DMA_InitStruct);
/* Enable DMA Stream Transfer Complete interrupt */
DMA_ITConfig(DMA2_Stream1, DMA_IT_TC, ENABLE);
DMA_Cmd(DMA2_Stream1, DISABLE);
/* Reset DMA2 Stream registers (for debug purpose) */
DMA_DeInit(DMA2_Stream6);
/* USART6_DMA_TX use DMA2_Stream6 */
DMA_InitStruct.DMA_Channel = DMA_Channel_5;
DMA_InitStruct.DMA_PeripheralBaseAddr = (uint32_t)&(USART6->DR);
DMA_InitStruct.DMA_Memory0BaseAddr = (uint32_t)&USART6_TX_DMA_Buf[0];
DMA_InitStruct.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStruct.DMA_BufferSize = (uint32_t)0;
DMA_InitStruct.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStruct.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStruct.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStruct.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStruct.DMA_Mode = DMA_Mode_Normal;
DMA_InitStruct.DMA_Priority = DMA_Priority_High;
DMA_InitStruct.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStruct.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
DMA_InitStruct.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStruct.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA2_Stream6, &DMA_InitStruct);
/* Enable DMA Stream Transfer Complete interrupt */
DMA_ITConfig(DMA2_Stream6, DMA_IT_TC, ENABLE);
/* DMA Stream enable */
DMA_Cmd(DMA2_Stream6, DISABLE);
/* Enable the DMA Stream IRQ Channel */
NVIC_InitStruct.NVIC_IRQChannel = DMA2_Stream1_IRQn;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 2;
NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStruct);
/* Enable the DMA Stream IRQ Channel */
NVIC_InitStruct.NVIC_IRQChannel = DMA2_Stream6_IRQn;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 2;
NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStruct);
NVIC_InitStruct.NVIC_IRQChannel = USART6_IRQn;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStruct);
}
/**
* @brief USART3_IRQHandler
*
* @param None.
* @retval None.
*/
void USART3_IRQHandler(void) {
if (USART_GetITStatus(USART3, USART_IT_RXNE) != RESET) {
(void)USART_ReceiveData(USART3);
}
if (USART_GetITStatus(USART3, USART_IT_TC) != RESET) {
USART_ITConfig(USART3, USART_IT_TC, DISABLE);
USART_ClearITPendingBit(USART3, USART_IT_TC);
GPIO_ResetBits(GPIOB, GPIO_Pin_7);
Flag_USART3_DMA_TX_Finish = 1;
}
/* If overrun condition occurs, clear the ORE flag and recover communication */
if (USART_GetFlagStatus(USART3, USART_FLAG_ORE) != RESET) {
(void)USART_ReceiveData(USART3);
}
}
/**
* @brief USART6_IRQHandler
* @param None.
* @retval None.
*/
void USART6_IRQHandler(void){
if (USART_GetITStatus(USART6, USART_IT_RXNE) != RESET) {
(void)USART_ReceiveData(USART6);
}
if (USART_GetITStatus(USART6, USART_IT_TC) != RESET) {
USART_ITConfig(USART6, USART_IT_TC, DISABLE);
USART_ClearITPendingBit(USART6, USART_IT_TC);
GPIO_ResetBits(GPIOD, GPIO_Pin_7);
Flag_USART6_DMA_TX_Finish = 1; // USART6 DMA TX Finish
}
/* If overrun condition occurs, clear the ORE flag and recover communication */
if (USART_GetFlagStatus(USART6, USART_FLAG_ORE) != RESET) {
(void)USART_ReceiveData(USART6);
}
}
/**
* @brief This function handles DMA1_Stream1 global interrupt request.
* @param None
* @retval None
*/
void DMA1_Stream1_IRQHandler(void) {
/* DMA1_Stream1 DMA_Channel_4 USART3_DMA_RX Transmission Finished */
if (DMA_GetITStatus(DMA1_Stream1, DMA_IT_TCIF1)) {
DMA_Cmd(DMA1_Stream1, DISABLE);
DMA_ClearITPendingBit(DMA1_Stream1, DMA_IT_TCIF1);
Flag_USART3_DMA_RX_Finish = 1; // USART3 DMA RX Finish
}
}
/**
* @brief This function handles DMA1_Stream3 global interrupt request.
* @param None
* @retval None
*/
void DMA1_Stream3_IRQHandler(void) {
/* DMA1_Stream3 Channel 4 USART3_DMA_TX Transmission Finished */
if (DMA_GetITStatus(DMA1_Stream3, DMA_IT_TCIF3)) {
DMA_Cmd(DMA1_Stream3, DISABLE);
DMA_ClearITPendingBit(DMA1_Stream3, DMA_IT_TCIF3);
USART_ClearFlag(USART3, USART_FLAG_TC);
USART_ITConfig(USART3, USART_IT_TC, ENABLE);
}
}
/**
* @brief This function handles DMA2_Stream2 global interrupt request.
* @param None
* @retval None
*/
void DMA2_Stream2_IRQHandler(void) {
/* DMA1_Stream2 Channel 3 SPI1_RX_DMA */
if (DMA_GetITStatus(DMA2_Stream2, DMA_IT_TCIF2)) {
DMA_Cmd(DMA2_Stream2, DISABLE);
DMA_ClearITPendingBit(DMA2_Stream2, DMA_IT_TCIF2);
}
}
/**
* @brief This function handles DMA2_Stream3 global interrupt request.
* @param None
* @retval None
*/
void DMA2_Stream3_IRQHandler(void) {
/* DMA1_Stream3 Channel 3 SPI1_TX_DMA */
if (DMA_GetITStatus(DMA2_Stream3, DMA_IT_TCIF3)) {
DMA_Cmd(DMA2_Stream3, DISABLE);
DMA_ClearITPendingBit(DMA2_Stream3, DMA_IT_TCIF3);
}
}
/**
* @brief This function handles DMA2_Stream1 global interrupt request.
* @param None
* @retval None
*/
void DMA2_Stream1_IRQHandler(void) {
/* DMA1_Stream1 Channel 5 USART6_DMA_RX Finished */
if (DMA_GetITStatus(DMA2_Stream1, DMA_IT_TCIF1)) {
DMA_Cmd(DMA2_Stream1, DISABLE);
DMA_ClearITPendingBit(DMA2_Stream1, DMA_IT_TCIF1);
Flag_USART6_DMA_RX_Finish = 1;
}
}
/**
* @brief This function handles DMA2_Stream6 global interrupt request.
* @param None
* @retval None
*/
void DMA2_Stream6_IRQHandler(void) {
/* DMA2_Stream6 Channel 5 USART6_DMA_TX Transmission Finished */
if (DMA_GetITStatus(DMA2_Stream6, DMA_IT_TCIF6)) {
DMA_Cmd(DMA2_Stream6, DISABLE);
DMA_ClearITPendingBit(DMA2_Stream6, DMA_IT_TCIF6);
USART_ClearFlag(USART6, USART_FLAG_TC);
USART_ITConfig(USART6, USART_IT_TC, ENABLE);
}
}
/**
* @brief This function handles DMA2_Stream5 global interrupt request.
* @param None
* @retval None
*/
void DMA2_Stream5_IRQHandler(void) {
/* DMA2_Stream5 Channel 4 USART1_DMA_RX Finished */
if (DMA_GetITStatus(DMA2_Stream5, DMA_IT_TCIF5)) {
DMA_Cmd(DMA2_Stream5, DISABLE);
DMA_ClearITPendingBit(DMA2_Stream5, DMA_IT_TCIF5);
}
}
/**
* @brief This function handles DMA2_Stream7 global interrupt request.
* @param None
* @retval None
*/
void DMA2_Stream7_IRQHandler(void) {
/* DMA2_Stream7 Channel 4 USART1_DMA_TX Transmission Finished */
if (DMA_GetITStatus(DMA2_Stream7, DMA_IT_TCIF7)) {
DMA_Cmd(DMA2_Stream7, DISABLE);
DMA_ClearITPendingBit(DMA2_Stream7, DMA_IT_TCIF7);
USART_ClearFlag(USART1, USART_FLAG_TC);
USART_ITConfig(USART1, USART_IT_TC, ENABLE);
}
}
/**
* 函數說明: USART3啟動DMA數據接收
* 輸入參數: 數據接收起始地址 接收數量
* 控制輸入: GPIOB.7設為為低
*/
void USART3_DMA_Receive(uint8_t *buf, uint16_t count) {
/* DMA1_Stream1 DMA_Channel_4 USART3_DMA_RX
* PB7 USART3 DE 接收控制腳 低電平 接收模式
* 啟動USART3的DMA接收，接收數據個數為count
*/
GPIO_ResetBits(GPIOB, GPIO_Pin_7);
DMA1_Stream1->M0AR = (uint32_t)buf;
DMA1_Stream1->NDTR = count;
DMA_Cmd(DMA1_Stream1, ENABLE);
}
/**
* 函數說明: USART3啟動DMA數據發送
* 輸入參數: 起始地址 發送數量
* 控制輸入: GPIOB.7設為高
*/
void USART3_DMA_Send(uint8_t *buf, uint16_t count) {
/* DMA1_Stream3 DMA_Channel_4 USART3_DMA_TX
* PB7 USART3 DE 接收控制腳 高電平 發送模式
* 啟動USART3的DMA發送，發送100個數據
*/
GPIO_SetBits(GPIOB, GPIO_Pin_7);
DMA1_Stream3->M0AR = (uint32_t) buf;
DMA1_Stream3->NDTR = count;
DMA_Cmd(DMA1_Stream3, ENABLE);
}
/**
* 函數說明: USART6啟動DMA數據接收
* 輸入參數: 數據接收起始地址 接收數量
* 控制輸入: GPIOD.7設為為低
*/
void USART6_DMA_Receive(uint8_t *buf, uint16_t count) {
/* DMA2_Stream1 DMA_Channel_5 USART6_DMA_RX
* PD7 USART6 DE 接收控制腳 低電平 接收模式
* 啟動USART6的DMA接收，接收數據個數為count
*/
GPIO_ResetBits(GPIOD, GPIO_Pin_7);
DMA2_Stream1->M0AR = (uint32_t)&USART6_RX_DMA_Buf[0];
DMA_SetCurrDataCounter(DMA2_Stream1, 100);
DMA_Cmd(DMA2_Stream1, ENABLE);
}
/**
* 函數說明: USART6啟動DMA數據發送
* 輸入參數: 起始地址 發送數量
* 控制輸入: GPIOD.7設為高
*/
void USART6_DMA_Send(uint8_t *buf, uint16_t count) {
/* DMA2_Stream6 DMA_Channel_5 USART6_DMA_TX
* PD7 USART6 DE 接收控制腳 高電平 發送模式
* 啟動USART6的DMA發送，發送數據個數為count
*/
GPIO_SetBits(GPIOD, GPIO_Pin_7);
DMA2_Stream6->M0AR = (uint32_t) buf;
DMA2_Stream6->NDTR = count;
DMA_Cmd(DMA2_Stream6, ENABLE);
}
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