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#include "stdio.h"
#include "string.h"
#include "intrins.h"
//#include "AT89X51.H"
#include "reg52.h"
//定義SJA1000的基址
#define SJA_BaseAdr 0X7F00
// 控制寄存器
#define REG_MODE SJA_BaseAdr+0x00 //內(nèi)部控制寄存器
#define REG_COMMAND SJA_BaseAdr+0x01 //命令寄存器
#define REG_STATUS SJA_BaseAdr+0x02 //狀態(tài)寄存器
#define REG_INTERRUPT SJA_BaseAdr+0x03 //中斷寄存器
#define REG_INTENABLE SJA_BaseAdr+0x04 //中斷使能寄存器
#define REG_BTR0 SJA_BaseAdr+0x06 //總線定時(shí)寄存器0
#define REG_BTR1 SJA_BaseAdr+0x07 //總線定時(shí)寄存器1
#define REG_OCR SJA_BaseAdr+0x08 //輸出控制寄存器
#define REG_TEST SJA_BaseAdr+0x09 //測(cè)試寄存器
#define REG_RESVER1 SJA_BaseAdr+0x0A //保留1
#define REG_ARBITRATE SJA_BaseAdr+0x0B //仲裁丟失捕捉
#define REG_ERRCATCH SJA_BaseAdr+0x0C //錯(cuò)誤代碼捕捉
#define REG_ERRLIMIT SJA_BaseAdr+0x0D //錯(cuò)誤報(bào)警限額
#define REG_RXERR SJA_BaseAdr+0x0E //接收錯(cuò)誤計(jì)數(shù)器
#define REG_TXERR SJA_BaseAdr+0x0F //發(fā)送錯(cuò)誤計(jì)數(shù)器
#define REG_ACR1 SJA_BaseAdr+0x10 //驗(yàn)收代碼寄存器
#define REG_ACR2 SJA_BaseAdr+0x11 //驗(yàn)收代碼寄存器
#define REG_ACR3 SJA_BaseAdr+0x12 //驗(yàn)收代碼寄存器
#define REG_ACR4 SJA_BaseAdr+0x13 //驗(yàn)收代碼寄存器
#define REG_AMR1 SJA_BaseAdr+0x14 //驗(yàn)收屏蔽寄存器
#define REG_AMR2 SJA_BaseAdr+0x15 //驗(yàn)收屏蔽寄存器
#define REG_AMR3 SJA_BaseAdr+0x16 //驗(yàn)收屏蔽寄存器
#define REG_AMR4 SJA_BaseAdr+0x17 //驗(yàn)收屏蔽寄存器
// 發(fā)送緩沖區(qū)寄存器
#define REG_TXD_FID SJA_BaseAdr+0x10 //發(fā)送緩沖區(qū)1
#define REG_TXD_ID1 SJA_BaseAdr+0x11 //發(fā)送緩沖區(qū)2
#define REG_TXD_ID2 SJA_BaseAdr+0x12 //發(fā)送緩沖區(qū)3
#define REG_TXD_ID3 SJA_BaseAdr+0x13 //發(fā)送緩沖區(qū)4
#define REG_TXD_ID4 SJA_BaseAdr+0x14 //發(fā)送緩沖區(qū)5
#define REG_TXBuffer1 SJA_BaseAdr+0x15 //發(fā)送緩沖區(qū)6
#define REG_TXBuffer2 SJA_BaseAdr+0x16 //發(fā)送緩沖區(qū)7
#define REG_TXBuffer3 SJA_BaseAdr+0x17 //發(fā)送緩沖區(qū)8
#define REG_TXBuffer4 SJA_BaseAdr+0x18 //發(fā)送緩沖區(qū)9
#define REG_TXBuffer5 SJA_BaseAdr+0x19 //發(fā)送緩沖區(qū)10
#define REG_TXBuffer6 SJA_BaseAdr+0x1A //發(fā)送緩沖區(qū)11
#define REG_TXBuffer7 SJA_BaseAdr+0x1B //發(fā)送緩沖區(qū)12
#define REG_TXBuffer8 SJA_BaseAdr+0x1C //發(fā)送緩沖區(qū)13
// 接收緩沖區(qū)寄存器
#define REG_RXD_FID SJA_BaseAdr+0x10 //接收緩沖區(qū)1
#define REG_RXD_ID1 SJA_BaseAdr+0x11 //接收緩沖區(qū)2
#define REG_RXD_ID2 SJA_BaseAdr+0x12 //接收緩沖區(qū)3
#define REG_RXD_ID3 SJA_BaseAdr+0x13 //接收緩沖區(qū)4
#define REG_RXD_ID4 SJA_BaseAdr+0x14 //接收緩沖區(qū)5
#define REG_RXBuffer1 SJA_BaseAdr+0x15 //接收緩沖區(qū)6
#define REG_RXBuffer2 SJA_BaseAdr+0x16 //接收緩沖區(qū)7
#define REG_RXBuffer3 SJA_BaseAdr+0x17 //接收緩沖區(qū)8
#define REG_RXBuffer4 SJA_BaseAdr+0x18 //接收緩沖區(qū)9
#define REG_RXBuffer5 SJA_BaseAdr+0x19 //接收緩沖區(qū)10
#define REG_RXBuffer6 SJA_BaseAdr+0x1A //接收緩沖區(qū)11
#define REG_RXBuffer7 SJA_BaseAdr+0x1B //接收緩沖區(qū)12
#define REG_RXBuffer8 SJA_BaseAdr+0x1C //接收緩沖區(qū)13
#define REG_RXCOUNT SJA_BaseAdr+0x1D //RX報(bào)文計(jì)數(shù)器
#define REG_RBSA SJA_BaseAdr+0x1E //接收緩沖區(qū)起始地址
#define REG_CDR SJA_BaseAdr+0x1F //時(shí)鐘分頻寄存器
/*
功能說(shuō)明: CAN控制器SJA1000通訊波特率.SJA1000的晶振為必須為
16MHZ*/
#define BTR0_Rate_20k 0x53 //20KBPS的預(yù)設(shè)值
#define BTR1_Rate_20k 0x2F //20KBPS的預(yù)設(shè)值
#define BTR0_Rate_40k 0x87 //40KBPS的預(yù)設(shè)值
#define BTR1_Rate_40k 0xFF //40KBPS的預(yù)設(shè)值
#define BTR0_Rate_50k 0x47 //50KBPS的預(yù)設(shè)值
#define BTR1_Rate_50k 0x2F //50KBPS的預(yù)設(shè)值
#define BTR0_Rate_80k 0x83 //80KBPS的預(yù)設(shè)值
#define BTR1_Rate_80k 0xFF //80KBPS的預(yù)設(shè)值
#define BTR0_Rate_100k 0x43 //100KBPS的預(yù)設(shè)值
#define BTR1_Rate_100k 0x2f //100KBPS的預(yù)設(shè)值
#define BTR0_Rate_125k 0x03 //125KBPS的預(yù)設(shè)值
#define BTR1_Rate_125k 0x1c //125KBPS的預(yù)設(shè)值
#define BTR0_Rate_200k 0x81 //200KBPS的預(yù)設(shè)值
#define BTR1_Rate_200k 0xFA //200KBPS的預(yù)設(shè)值
#define BTR0_Rate_250k 0x01 //250KBPS的預(yù)設(shè)值
#define BTR1_Rate_250k 0x1c //250KBPS的預(yù)設(shè)值
#define BTR0_Rate_400k 0x80 //400KBPS的預(yù)設(shè)值
#define BTR1_Rate_400k 0xfa //400KBPS的預(yù)設(shè)值
#define BTR0_Rate_500k 0x00 //500KBPS的預(yù)設(shè)值
#define BTR1_Rate_500k 0x1c //500KBPS的預(yù)設(shè)值
#define BTR0_Rate_666k 0x80 //666KBPS的預(yù)設(shè)值
#define BTR1_Rate_666k 0xb6 //666KBPS的預(yù)設(shè)值
#define BTR0_Rate_800k 0x00 //800KBPS的預(yù)設(shè)值
#define BTR1_Rate_800k 0x16 //800KBPS的預(yù)設(shè)值
#define BTR0_Rate_1000k 0x00 //1000KBPS的預(yù)設(shè)值
#define BTR1_Rate_1000k 0x14 //1000KBPS的預(yù)設(shè)值
//命令字
#define TR_CMD 0X01
#define AT_CMD 0X02
#define RRB_CMD 0X04
#define COS_CMD 0X08
#define GTS_CMD 0X10
//錯(cuò)誤字
#define CAN_INTERFACE_OK 0
#define CAN_BUS_OK 0
#define CAN_INTERFACE_ERR 0XFF
#define CAN_ENTERSET_ERR 0XFE
#define CAN_QUITSET_ERR 0XFD
#define CAN_INITOBJECT_ERR 0XFC
#define CAN_INITBTR_ERR 0XFB
#define CAN_INITOUTCTL_ERR 0XFA
#define CAN_INTCLKDIV_ERR 0XF9
#define CAN_BUS_ERR 0XF8
//系統(tǒng)指針，指向SJA1000
unsigned char xdata *SJA_BCANAdr;
unsigned char data Tmod_data;
unsigned char run_lamp_flush_count = 0;
unsigned char run_lamp_flush_time = 10;
sbit run_lamp = P1^1;
unsigned char data send_data[10],rcv_data[10];
unsigned int data rxbuffer[10]={REG_RxBuffer1,REG_RxBuffer2,REG_RxBuffer3,REG_RxBuffer4,REG_RxBuffer5,REG_RxBuffer6,REG_RxBuffer7,REG_RxBuffer8,REG_RxBuffer9,REG_RxBuffer10};
unsigned int data txbuffer[10]={REG_TxBuffer1,REG_TxBuffer2,REG_TxBuffer3,REG_TxBuffer4,REG_TxBuffer5,REG_TxBuffer6,REG_TxBuffer7,REG_TxBuffer8,REG_TxBuffer9,REG_TxBuffer10};
unsigned char bdata flag_init;
sbit rcv_flag=flag_init^0;
sbit err_flag=flag_init^0;
sbit cs=P2^7;
bit BCAN_CREAT_COMMUNATION(void)
{ SJA_BCANAdr=REG_TEST;
*SJA_BCANAdr=0XAA;
if(*SJA_BCANAdr==0XAA)
{return 0;}
else
{return 1;}
}
bit BCAN_ENTER_RETMODEL(void)
{
unsigned char tempdata;
SJA_BCANAdr=REG_CONTROL;
tempdata=*SJA_BCANAdr;
*SJA_BCANAdr=(tempdata|0x01);
if(*SJA_BCANAdr&0X01==0X01)
{return 0;}
else
{return 1;}
}
bit BCAN_QUIT_RETMODEL(void)
{
unsigned char tempdata;
SJA_BCANAdr=REG_CONTROL;
tempdata=*SJA_BCANAdr;
*SJA_BCANAdr=(tempdata&0xFE);
if(*SJA_BCANAdr&0X01==0X00)
{return 0;}
else
{return 1;}
}
bit BCAN_SET_BANDRATE(unsigned char CAN_ByteRate)
{
unsigned char BR_Num= CAN_ByteRate,BTR0_num,BTR1_num;
switch (BR_Num)
{
case ByteRate_40k :
BTR0_num=0x87;
BTR1_num=0xff;
break;
case ByteRate_50k :
BTR0_num=0x47;
BTR1_num=0x2f;
break;
case ByteRate_80k :
BTR0_num=0x83;
BTR1_num=0xff;
break;
case ByteRate_100k :
BTR0_num=0x43;
BTR1_num=0x2f;
break;
case ByteRate_200k :
BTR0_num=0x81;
BTR1_num=0xfa;
break;
case ByteRate_400k :
BTR0_num=0x80;
BTR1_num=0xfa;
break;
case ByteRate_500k :
BTR0_num=0x01;
BTR1_num=0x1c;
break;
case ByteRate_800k :
BTR0_num=0x00;
BTR1_num=0x16;
break;
case ByteRate_1000k :
BTR0_num=0x00;
BTR1_num=0x14;
break;
default :
return 1;
break;
}
SJA_BCANAdr=REG_BTR0;
*SJA_BCANAdr=BTR0_num;
if(*SJA_BCANAdr!=BTR0_num)
{return 1;}
SJA_BCANAdr=REG_BTR1;
*SJA_BCANAdr=BTR1_num;
if(*SJA_BCANAdr!=BTR1_num)
{return 1;}
return 0;
}
bit BCAN_SET_OBJECT(unsigned char BCAN_ACR,unsigned char BCAN_AMR)
{
SJA_BCANAdr=REG_ACR;
*SJA_BCANAdr= BCAN_ACR;
if(*SJA_BCANAdr!= BCAN_ACR)
{return 1;}
SJA_BCANAdr=REG_AMR;
*SJA_BCANAdr= BCAN_AMR;
if(*SJA_BCANAdr!= BCAN_AMR)
{return 1;}
return 0;
}
bit BCAN_SET_OUTCLK(unsigned char OUT_CONTROL,unsigned char CLOCK_OUT)
{
SJA_BCANAdr=REG_OCR;
*SJA_BCANAdr= OUT_CONTROL;
if(*SJA_BCANAdr!= OUT_CONTROL)
{return 1;}
SJA_BCANAdr=REG_CDR;
*SJA_BCANAdr= CLOCK_OUT;
if(*SJA_BCANAdr!= CLOCK_OUT)
{return 1;}
else
return 0;
}
bit BCAN_DATA_WRITE(unsigned char *senddatabuf)
{
unsigned char tempcount,i;
SJA_BCANAdr=REG_STATUS;
if((*SJA_BCANAdr&0x08)==0)
{return 1;}
if((*SJA_BCANAdr&0x04)==0)
{return 1;}
SJA_BCANAdr=REG_TxBuffer1;
if((senddatabuf[1]&0x10)==0)
{tempcount=(senddatabuf[1]&0x0f)+2;}
else
{tempcount=2;}
for (i=0;i<tempcount; i++)
{
SJA_BCANAdr=txbuffer[i];//發(fā)送區(qū)的地址區(qū)
*SJA_BCANAdr=senddatabuf[i];
}
memcpy(SJA_BCANAdr,senddatabuf,tempcount);
return 0;
}
bit BCAN_DATA_RECEIVE(unsigned char *RCVdatabuf)
{
unsigned char tempcount;
SJA_BCANAdr=REG_STATUS;
if((*SJA_BCANAdr&0x01)==0)
{return 1;}
SJA_BCANAdr=REG_RxBuffer2;
if((*SJA_BCANAdr&0x10)==0)
{ tempcount=(*SJA_BCANAdr&0x0f)+2;}
else
{ tempcount=2;}
SJA_BCANAdr=REG_RxBuffer1;
memcpy(RCVdatabuf,SJA_BCANAdr,tempcount);
return 0;
}
bit BCAN_CMD_PGR(unsigned char cmd)
{
SJA_BCANAdr=REG_COMMAND;
*SJA_BCANAdr= cmd;
switch (cmd)
{
case TR_CMD:
return 0;
break;
case AT_CMD:
SJA_BCANAdr=REG_STATUS;
if((*SJA_BCANAdr&0X20)==0)
{return 0;}
else
{return 1;}
break;
case RRB_CMD:
SJA_BCANAdr=REG_STATUS;
if((*SJA_BCANAdr&0X01)==1)
{return 1;}
else
{return 0;}
break;
case COS_CMD:
SJA_BCANAdr=REG_STATUS;
if((*SJA_BCANAdr&0X02)==0)
{return 0;}
else
{return 1;}
break;
case GTS_CMD:
return 0;
break;
default :
return 1;
break;
}
}
void ex0_init(void) interrupt 0 using 1
{
SJA_BCANAdr=REG_INTERRUPT;
flag_init=*SJA_BCANAdr;
}
void Init_Cpu( void )
{
PX0=1;
IT0=1;
EX0=1;
ET0=1;
EA=1;
cs=0;
}
void Init_SJA( void )
{
BCAN_ENTER_RETMODEL();
BCAN_SET_BANDRATE(8);
BCAN_SET_OBJECT(0x00,0x00);
BCAN_SET_OUTCLK(0xAA,0X48);
BCAN_QUIT_RETMODEL();
SJA_BCANAdr=REG_CONTROL;
*SJA_BCANAdr|=0x1e;
}
void T0IN (void) interrupt 1 using 2
{
TR0=0;
if(run_lamp_flush_count >= run_lamp_flush_time)
{
if(run_lamp)
{ run_lamp = 0; run_lamp_flush_time = 0; }
else
{ run_lamp = 1; run_lamp_flush_time = 40; }
run_lamp_flush_count = 0;
}
else
run_lamp_flush_count++;
TH0=0X4C;
TL0=0X00;
TR0=1;
}
void initt0(void)
{
Tmod_data=TMOD;
Tmod_data&=0X0F;
Tmod_data|=0x01;
TMOD=Tmod_data;
TH0=0X4C;
TL0=0X00;
TR0=1;
}
void main (void)
{
unsigned int delay;
for(delay=0;delay<30000;delay++) {; } // 復(fù)位延時(shí)
initt0();
Init_Cpu();
cs=1;
Init_SJA();
flag_init=0X00;
while (1)
{
if (rcv_flag)
{
rcv_flag=0;
BCAN_DATA_RECEIVE(rcv_data);
BCAN_CMD_PGR(0x04);
}
if(err_flag)
{
err_flag=0;
Init_SJA();
}
}
}
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