基于FPGA的交通燈vhdl程序設計

ID:540107 · 發表于 2019-12-29 11:15

單片機源程序如下:

-------------------------------------
-- Title:交通燈控制器 --
-- Data: 2019-12-11 --
-------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
--------------------------------------------------------------------
entity traffic_light is
port( Clk : in std_logic; --時鐘輸入為50MHz
Rst : in std_logic; --復位輸入
R1,R2 : out std_logic; --紅燈輸出
Y1,Y2 : out std_logic; --黃燈輸出
G1,G2 : out std_logic; --綠燈輸出
Display : out std_logic_vector(6 downto 0); --七段碼管顯示輸出
SEG_SEL : buffer std_logic_vector(3 downto 0) --七段碼管掃描驅動(四位數碼管)
);
end traffic_light ;
--------------------------------------------------------------------
architecture behave of traffic_light is
signal Disp_Temp : integer range 0 to 15;
signal Disp_Decode : std_logic_vector(6 downto 0); --段選緩存
signal SEC1,SEC10 : integer range 0 to 9;
signal Direction : integer range 0 to 15;
signal Clk_Count1 : std_logic_vector(9 downto 0); --產生0.5Hz時鐘的分頻計數器
signal Clk1Hz : std_logic;
signal Dir_Flag : std_logic; --方向標志
signal C : integer range 0 to 50000:=0; --50MHz轉1kHz
signal L : integer range 0 to 50000:=0; --50MHz轉1kHz
signal Wei_Flag : std_logic_vector(1 downto 0); --當前掃描數碼管位數
signal Wei : std_logic_vector(3 downto 0); --位選緩存
begin
process(Clk)
begin
if(Clk'event and Clk='1') then
C<=C+1;
if(C>=50000) then --50MHz轉1kHz
C<=0;
if(Clk_Count1<1000) then
Clk_Count1<=Clk_Count1+"01";
else
Clk_Count1<="0000000001";
end if;
end if;
end if;
end process;
Clk1Hz<=Clk_Count1(9);
process(Clk1Hz,Rst)
begin
if(Rst='0') then
SEC1<=0;
SEC10<=2;
Dir_Flag<='0';
elsif(Clk1Hz'event and Clk1Hz='1') then
if(SEC1=0) then
SEC1<=9;
if(SEC10=0) then
SEC10<=1;
else
SEC10<=SEC10-1;
end if;
else
SEC1<=SEC1-1;
end if;
if(SEC1=0 and SEC10=0) then
Dir_Flag<=not Dir_Flag;
end if;
end if;
end process;
process(Clk1Hz,Rst)
begin
if(Rst='0') then
R1<='1';
G1<='0';
R2<='1';
G2<='0';
else --正常運行
if(SEC10>0 or SEC1>3) then
if(Dir_Flag='0') then --橫向通行
R1<='0';
G1<='1';
R2<='1';
G2<='0';
else
R1<='1';
G1<='0';
R2<='0';
G2<='1';
end if;
else
if(Dir_Flag='0') then --橫向通行
R1<='0';
G1<='0';
R2<='1';
G2<='0';
else
R1<='1';
G1<='0';
R2<='0';
G2<='0';
end if;
end if;
end if;
end process;
process(Clk1Hz)
begin
if(SEC10>0 or SEC1>3) then
Y1<='0';
Y2<='0';
elsif(Dir_Flag='0') then
Y1<=Clk1Hz;
Y2<='0';
else
Y1<='0';
Y2<=Clk1Hz;
end if;
end process;
process(Dir_Flag)
begin
if(Dir_Flag='0') then --橫向
Direction<=10;
else --縱向
Direction<=11;
end if;
end process;
process(Wei_Flag)
begin
case (Wei_Flag+"01") is
when "00"=>
Wei<="1110";
Disp_Temp<=Direction;
when "01"=>
Wei<="1101";
Disp_Temp<=Direction;
when "10"=>
Wei<="1011";
Disp_Temp<=SEC10;
when "11"=>
Wei<="0111";
Disp_Temp<=SEC1;
end case;
end process;
process(Clk)
begin
if(Clk'event and Clk='1') then --掃描累加
L<=L+1; --50MHz轉1kHz
if(L>=50000) then
L<=0;
SEG_SEL<=Wei;
Wei_Flag<=Wei_Flag+1; --準備下一數碼管
Display<=Disp_Decode;
end if;
end if;
end process;
process(Disp_Temp) --顯示轉換
begin
case Disp_Temp is
when 0=>Disp_Decode<="0111111"; --'0'
when 1=>Disp_Decode<="0000110"; --'1'
when 2=>Disp_Decode<="1011011"; --'2'
when 3=>Disp_Decode<="1001111"; --'3'
when 4=>Disp_Decode<="1100110"; --'4'
when 5=>Disp_Decode<="1101101"; --'5'
when 6=>Disp_Decode<="1111101"; --'6'
when 7=>Disp_Decode<="0000111"; --'7'
when 8=>Disp_Decode<="1111111"; --'8'
when 9=>Disp_Decode<="1101111"; --'9'
when 10=>Disp_Decode<="1001000"; --'='
when 11=>Disp_Decode<="0110110"; --'||'
when others=>Disp_Decode<="0000000"; --全滅
end case;
end process;
end behave;

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所有資料51hei提供下載:

交通燈.pdf (137.48 KB, 下載次數: 37)

traffic_light.zip (1.56 KB, 下載次數: 42)

ID:704585 · 發表于 2020-4-8 14:23

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基于FPGA的交通燈vhdl程序設計